1. Field of Invention
This invention relates to an alignment system for a lithographic projection apparatus, and a lithographic projection apparatus having such an alignment system, and more particularly to an alignment system that can detect the position of an alignment mark using at least two separate signals detected substantially in parallel and/or detect the position of a multi-target mark.
2. Discussion of Related Art
Lithographic projection apparatuses are essential components for the manufacture of integrated circuits and/or other microdevices. With the aid of such an apparatus, a number of masks having different mask patterns are successively imaged at a precisely aligned position onto a substrate such as a semiconductor wafer or an LCD panel. The substrate must undergo the desired physical and chemical changes between the successive images that have been aligned with each other. The substrate is removed from the apparatus after it has been exposed with a mask pattern, and, after it has undergone the desired process steps, the substrate is replaced in order to expose it with an the second mask pattern and the subsequent mask patterns are positioned accurately with respect to the substrate. To this end, the lithographic projection apparatus is provided with an optical alignment system with which alignment marks on the substrate are aligned with respect to alignment marks on the mask.
A lithographic apparatus may not only be used for the manufacture of ICs but also for the manufacture of other structures having detailed dimensions of the order of 1 micrometer, or smaller. Examples are structures of integrated, or plenary, optical systems or guiding and detection patterns of magnetic domain memories, micro-electromechanical systems (MEMS), and structures of liquid crystal display panels. Also in the manufacture of these structures, images of mask patterns must be aligned very accurately with respect to a substrate.
The lithographic projection apparatus may be a stepping apparatus or a step-and-scan apparatus. In a stepping apparatus, the mask pattern is imaged in one shot on an IC area of the substrate. Subsequently, the substrate is moved with respect to the mask in such a way that a subsequent IC area will be situated under the mask pattern and the projection lens system and the mask pattern is imaged on the subsequent IC area. This process is repeated until all IC areas of the substrate are provided with a mask pattern image. In a step-and-scan apparatus, the above-mentioned stepping procedure is also followed, but the mask pattern is not imaged in one shot, but via scanning movement. During imaging of the mask pattern, the substrate is moved synchronously with the mask with respect to the projection system and the projection beam, taking the magnification of the projection system into account. A series of juxtaposed partial images of consecutively exposed parts of the mask pattern is imaged in an IC area. After the mask pattern has been completely imaged in an IC area, a step is made to a subsequent IC area. A possible scanning procedure is described in the article: “Sub-micron 1:1 Optical Lithography” by D. A. Markle in the magazine “Semiconductors International” of May 1986, pp. 137-142.
U.S. Pat. No. 5,243,195 discloses an optical lithographic projection apparatus provided with an alignment system and intended for the manufacture of ICs. This alignment system comprises an off-axis alignment unit for aligning a substrate alignment mark with respect to this alignment unit. In addition, this alignment system comprises a second alignment unit for aligning a substrate mark with respect to a mask mark via the projection lens (TTL). Alignment via the projection lens (on-axis alignment) is frequently used in many current generation of optical lithographic projection apparatuses and provides the advantage that the substrate and the mask can be aligned directly with respect to each other. When the off-axis alignment method is used, the baseline offset as described in U.S. Pat. No. 5,243,195 must be taken into account. However, with the continued decrease in the size of components on ICs and the increase in complexity, on-axis alignment systems have proven to be difficult to improve sufficiently to achieve the require precision and accuracy.
In connection with the increasing number of electronic components per unit of surface area of the substrate and the resultant smaller dimensions of these components, increasingly stricter requirements are imposed on the accuracy with which integrated circuits are made. The positions where the successive masks are imaged on the substrate must therefore be fixed more and more accurately. In the manufacture of new-generation ICs with smaller line widths, the alignment accuracy will have to be improved or, in other words, it must be possible to detect smaller deviations so that the resolving power of the alignment system must be increased. On the other hand, stricter requirements must also be imposed on the flatness of the substrate due to the required higher numerical aperture (NA) of the projection lens system in the case of decreasing line widths. The depth of focus of this system decreases as the NA increases. Since some image field curvature occurs at the desired relatively large image field of the projection lens system, there is hardly any room left for unevenness of the substrate. To obtain the desired flatness of the substrate, it has been proposed to polish the substrate by the chemical mechanical polishing (CMP) process between two consecutive exposures with different mask patterns in the projection apparatus. However, this polishing process affects the accuracy of the on-axis alignment method. In this method, a grating is used as a substrate alignment mark and the sub-beams diffracted in the first order by this grating are used for imaging the substrate mark on the reticle mark. In this process, it is assumed that the substrate is aligned correctly with respect to the reticle when the point of gravity of the substrate grating mark is aligned with respect to the point of gravity of the reticle alignment mark. In that case it has been assumed that the point of gravity for each grating mark coincides with the geometrical center of the grating. However, the CMP process renders the substrate grating mark asymmetrical so that this alignment method is no longer reliable. In addition, the various processing steps contribute to changes in the alignment marks including introducing asymmetries and changes in the effective depth of the grooves of the substrate grating marks. Other processing steps and/or methods often introduce different types of errors. For example, the Cu-damascene process tends to introduce alignment errors in a random distribution across an IC surface. With the decrease in size and increase in complexity of structures built by lithographic techniques there is a continued demand to improve alignment accuracy. Without the improvement of alignment accuracy, improvements in resolution cannot be utilized. In addition, the increased complexity of the micro-devices places greater demand for techniques to control and minimize the number of substrates that have to be discarded during the manufacturing process due to alignment errors.